RegViz: Visualize GTBER2 Bitfield

Renesas Electronics /R7FA6T2BD /GPT320 /GTBER2

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Interpret as GTBER2

CPTADA=0, CMTCA=00, CCTADB=0, CPTPR=0, CMTADB=0, CCTPR=0, CCTCB=0, CPTCB=0, OLTTA=00, CP3DB=0, CCTADA=0, CCTCA=0, CPTCA=0, CPTDV=0, CCTDV=0, CMTCB=00, CPBTD=0, CPTADB=0, OLTTB=00, CMTADA=0

Description

General PWM Timer Buffer Enable Register 2

Fields

CCTCA	Counter Clear Source GTCCRA Register Buffer Transfer Disable 0 (0): Enable GTCCRA register buffer transfer by counter clear 1 (1): Disable GTCCRA register buffer transfer by counter clear
CCTCB	Counter Clear Source GTCCRB Register Buffer Transfer Disable 0 (0): Enable GTCCRB register buffer transfer by counter clear 1 (1): Disable GTCCRB register buffer transfer by counter clear
CCTPR	Counter Clear Source GTPR Register Buffer Transfer Disable 0 (0): Enable GTPR register buffer transfer by counter clear 1 (1): Disable GTPR register buffer transfer by counter clear
CCTADA	Counter Clear Source GTADTRA Register Buffer Transfer Disable 0 (0): Enable GTADTRA register buffer transfer by counter clear 1 (1): Disable GTADTRA register buffer transfer by counter clear
CCTADB	Counter Clear Source GTADTRB Register Buffer Transfer Disable 0 (0): Enable GTADTRB register buffer transfer by counter clear 1 (1): Disable GTADTRB register buffer transfer by counter clear
CCTDV	Counter Clear Source GTDVU/GTDVD Register Buffer Transfer Disable 0 (0): Enable GTDVU/GTDVD register buffer transfer by counter clear 1 (1): Disable GTDVU/GTDVD register buffer transfer by counter clear
CMTCA	Compare Match Source GTCCRA Register Buffer Transfer Enable 0 (00): Disable GTCCRA register Buffer Transfer by compare match of GTCCRA register and GTCCRB register 1 (01): Enable GTCCRA register Buffer Transfer by compare match of GTCCRA register 2 (10): Enable GTCCRA register Buffer Transfer by compare match of GTCCRB register 3 (11): Enable GTCCRA register Buffer Transfer by compare match of GTCCRA register and GTCCRB register
CMTCB	Compare Match Source GTCCRB Register Buffer Transfer Enable 0 (00): Disable GTCCRB register Buffer Transfer by compare match of GTCCRA register and GTCCRB register 1 (01): Enable GTCCRB register Buffer Transfer by compare match of GTCCRA register 2 (10): Enable GTCCRB register Buffer Transfer by compare match of GTCCRB register 3 (11): Enable GTCCRB register Buffer Transfer by compare match of GTCCRA register and GTCCRB register
CMTADA	Compare Match Source GTADTRA Register Buffer Transfer Enable 0 (0): Disable GTADTRA register buffer transfer by compare match of GTADTRA register 1 (1): Enable GTADTRA register buffer transfer by compare match of GTADTRA register
CMTADB	Compare Match Source GTADTRB Register Buffer Transfer Enable 0 (0): Disable GTADTRB register buffer transfer by compare match of GTADTRB register 1 (1): Enable GTADTRB register buffer transfer by compare match of GTADTRB register
CPTCA	Overflow/Underflow Source GTCCRA Register Buffer Transfer Disable 0 (0): Enable GTCCRA register buffer transfer by overflow/underflow 1 (1): Disable GTCCRA register buffer transfer by overflow/underflow
CPTCB	Overflow/Underflow Source GTCCRB Register Buffer Transfer Disable 0 (0): Enable GTCCRB register buffer transfer by overflow/underflow 1 (1): Disable GTCCRB register buffer transfer by overflow/underflow
CPTPR	Overflow/Underflow Source GTPR Register Buffer Transfer Disable 0 (0): Enable GTPR register buffer transfer by overflow/underflow 1 (1): Disable GTPR register buffer transfer by overflow/underflow
CPTADA	Overflow/Underflow Source GTADTRA Register Buffer Transfer Disable 0 (0): Enable GTADTRA register buffer transfer by overflow/underflow 1 (1): Disable GTADTRA register buffer transfer by overflow/underflow
CPTADB	Overflow/Underflow Source GTADTRB Register Buffer Transfer Disable 0 (0): Enable GTADTRB register buffer transfer by overflow/underflow 1 (1): Disable GTADTRB register buffer transfer by overflow/underflow
CPTDV	Overflow/Underflow Source GTDVU/GTDVD Register Buffer Transfer Disable 0 (0): Enable GTDVU/GTDVD register buffer transfer by overflow/underflow 1 (1): Disable GTDVU/GTDVD register buffer transfer by overflow/underflow
CP3DB	Complementary PWM mode 3,4 Double Buffer select 0 (0): Disable double buffer function in complementary PWM mode 3, 4 1 (1): Enable double buffer function in complementary PWM mode 3, 4
CPBTD	Complementary PWM mode Buffer Transfer Disable 0 (0): Enable buffer transfer from temporary register to GTCCRC and GTPBR register 1 (1): Disable buffer transfer from temporary register to GTCCRC and GTPBR register
OLTTA	GTIOCnA Output Level Buffer Transfer Timing Select 0 (00): No transfer 1 (01): Triangle waves, complementary PWM mode: Transfer at crest Saw waves: Transfer at the end of period 2 (10): Triangle waves, complementary PWM mode: Transfer at trough Saw waves: Transfer by compare match of GTCCRA register 3 (11): Triangle waves, complementary PWM mode: Transfer at both crest and trough Saw waves: Setting prohibited
OLTTB	GTIOCnB Output Level Buffer Transfer Timing Select 0 (00): No transfer 1 (01): Triangle waves, complementary PWM mode: Transfer at crest Saw waves: Transfer at the end of period 2 (10): Triangle waves, complementary PWM mode: Transfer at trough Saw waves: Transfer by compare match of GTCCRB register 3 (11): Triangle waves, complementary PWM mode: Transfer at both crest and trough Saw waves: Setting prohibited

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